1. Field of the Invention
The invention relates to electronic circuit testing, and more particularly to generating signals to exercise and test an integrated circuit.
2. Background Description
As the complexity of integrated circuits has increased, a need has arisen for more sophisticated testing, exercising, and burn-in procedures. Additionally, the increased complexity of integrated circuits means more pin connections must be tested as well as requiring testing signals of increasing complexity to test as much functionality of the device under test as reasonably possible. Furthermore, as the performance requirements of integrated circuits have increased, acceptable manufacturing tolerances of integrated circuits have narrowed.
Accordingly, testing signal requirements have grown in complexity, requiring substantial amounts of time to program such complex testing signals into a pattern generator. For example, some inputs on an integrated circuit may require a “pre-signal” at a particular pin to precondition the internal circuitry connected to the pin before receiving the actual test signal. Such pre-signals may be required, for example, in order for the circuit to respond to an input signal as intended by the circuit designer. Thus, a system which allows designing a particular testing signal, and further allows the particular testing signal to be delivered as a pre-signal before the testing cycle actually begins is desirable.
Additionally, integrated circuit exercising may require alternating between signals which burn-in or exercise the integrated circuit with signals that test the functionality of the integrated circuit. Periodic testing during burn-in increases testing throughput by allowing circuits that have prematurely failed to be replaced by the next circuit needing testing. Accordingly, alternating between burn-in or exercise signals and testing signals may require extremely complex test patterns.
Furthermore, testing signals may require numerous signals, for example thousands, which are based on a preselected base signal which varies in a particular way with each repetition. Such a variation may progressively change with each repetition since individually programming thousands of different signals is impractical. A way to generate a base signal including specifying a variation with each repetition can simplify the creation of testing signal patterns. Also, some pins of an integrated circuit undergoing an exercising procedure may require a particular test signal out of many test signals to be selectively repeated. Thus, a need arises for a testing system which has memory capability attached to each pin input and allows the particular test signal, such as the most recent test signal, to be saved and recalled at predetermined times.
Hardware on new test systems typically have pipeline delays in various sections of the tool. Writing patterns which can control these offsets and still maintain the pattern has been a difficult task. Previously there was no known pattern generator that could handle such offsets. However, improvements in technology have recently been developed which allow breaking apart of various segments of a signal into individual components and controlling the output from macros creating the segments independently by either advancing or delaying them. Because such pattern generators offer so many signal possibilities, they require substantial amounts of operator time to set up a particular signal for testing purposes.